High Bandwidth Memory (HBM)

What it is

High Bandwidth Memory is a DRAM architecture in which multiple memory chips are stacked vertically and connected by through-silicon vias, then bonded alongside a logic die, such as a GPU or AI accelerator, on a silicon interposer. The interposer carries an interface 16 to 32 times wider than a conventional DDR channel: 2,048 bits in HBM4, versus 64 bits in DDR5. The result is bandwidth measured in terabytes per second per stack, critical for AI training and inference workloads that must move billions of model-weight parameters every millisecond.

Three companies supply virtually all commercial HBM. South Korea's SK Hynix (Icheon, Gyeonggi Province) holds the largest share. South Korea's Samsung Electronics (Suwon, Gyeonggi Province) is the second supplier. US-based Micron Technology (Boise, Idaho) entered HBM production later and has been rapidly gaining qualification wins. Demand flows primarily through Nvidia's AI accelerators, with AMD's Instinct series and Google's TPU programs as secondary buyers.

History

AMD and South Korea's SK Hynix began joint development in the late 2000s. JEDEC ratified the first HBM standard (JESD235) in October 2013, targeting 128 GB/s per stack. AMD's Fury graphics cards, released in 2015, were the first commercial HBM products. HBM2 (January 2016) doubled per-stack bandwidth and was adopted in Nvidia's Volta V100 (2017) and AMD's Vega series. HBM2E, an enhanced variant, powered Nvidia's Ampere A100 (2020), delivering an aggregate 2 TB/s.

JEDEC ratified HBM3 on January 27, 2022. SK Hynix produced the first commercial HBM3 and supplied it for Nvidia's H100, carrying 80 GB at an aggregate 3.35 TB/s. HBM3E followed, shipping in Nvidia's H200 at 141 GB and 4.8 TB/s aggregate. In April 2025, JEDEC published HBM4 (JESD270-4), doubling the interface to 2,048 bits and targeting up to 2 TB/s per stack, with 16-layer configurations storing up to 48 GB per stack.

Current state

Volume HBM4 shipments began in early 2026. In June 2026, Nvidia certified all three memory suppliers for the Vera Rubin GPU generation (see Nvidia certifies all three memory makers for Vera Rubin HBM4, SK Hynix takes the lion's share); SK Hynix holds an estimated 60 to 70 percent of Rubin allocation, with Samsung and Micron splitting the remainder. Twelve-layer HBM4 stacks are priced above US$600 per unit. The broader HBM market is valued at roughly US$38 billion in 2025 and is projected at US$58 billion in 2026.

Supply is severely constrained. Micron reported in June 2026 that its entire HBM4 capacity for the fiscal year was already booked (see マイクロンの過去最高四半期、HBMは完売、粗利益率は81%近く). Industry analysts call the shortage "RAMageddon", a term covering both HBM and conventional DRAM, expected to persist through 2027.

Relationships

HBM stacks are bonded to GPU dies on interposers produced by Taiwan's TSMC using the CoWoS (Chip on Wafer on Substrate) process; TSMC's CoWoS line capacity is a parallel supply bottleneck. Apple's 2025 device price increases were partly attributed to memory cost pressure from HBM demand competition (see アップル、AIメモリ需要高騰でMacBook・iPad値上げ、過去最大ペースの部品コスト増と説明). Samsung's foundry division is investing in advanced packaging to reduce reliance on TSMC and recover qualification ground lost to SK Hynix (see Samsung bets on a memory-plus-foundry dual engine as Tesla and Nvidia knock). On the demand side, hyperscale buildouts such as the Cerebras-OpenAI data-center project (see CerebrasがOpenAIと200億ドル規模・750MWの推論供給契約を締結) represent the scale of the pull on HBM capacity.

What to watch

The next generation, HBM4E, is under development and is expected to raise per-pin speeds beyond 8 Gb/s. JEDEC is separately preparing SPHBM4, a reduced-pin-count variant targeting edge inference devices. Samsung must pass each successive Nvidia qualification round to recover share; the Vera Rubin outcome established a template in which SK Hynix's yield advantage converts into structural allocation dominance. US export restrictions on advanced AI chips may progressively restrict HBM deliveries to Chinese buyers, adding a geopolitical routing dimension. HBM4 wafer capacity additions in South Korea and the United States, via Micron's Idaho fabs, will determine how quickly the shortage loosens.